1. Field of the Invention
This invention is related to the field of computer systems, and more particularly address translation mechanisms for input/output (I/O) device-initiated requests.
2. Description of the Related Art
Computer systems of various types are ubiquitous in modern society, including personal computers (PCs), workstations, servers, various personal digital assistant (PDA) devices, etc. Most, if not all, of these computer systems have implemented memory management functionality for processor accesses to memory. Generally, the memory management functionality has included translating addresses from a virtual address space used by each process to a physical address space that spans the actual system memory, along with various memory protections (e.g. read only, read/write, privilege level requirements, etc.). The memory management functionality has a variety of uses: protecting the memory used by each process from unauthorized access by other processes; permitting large virtual spaces to be used by processes even if the physical memory system is not that large; relocation of virtual addresses to available physical memory without the participation of the process; etc.
While the processor addresses are frequently translated, addresses used by input/output (I/O) devices in computer systems are generally not translated. That is, the I/O devices use physical addresses to access memory. In a single operating system (OS) computer system, such as most PCs, the OS controls access to the I/O devices by other processes (applications and OS services). Accordingly, the OS can control which process has access to a given device at any given point in time, and can at least somewhat control the addresses accessed by the device. However, such mechanisms become more complicated and cumbersome in virtual machine systems, which may have multiple guest OSs running on a virtual machine monitor. Additionally, devices' use of physical addresses reduces the overall security of the system, since a rogue device (or a device programmed by a malicious software agent) can access memory unimpeded.
Additional challenges exist on at least some peripheral interfaces to which the I/O devices are connected or over which the devices communicate, directly or indirectly (e.g. through one or more bridges that bridge between peripheral interfaces). An address space associated with the peripheral interface can include one or more address ranges that are assigned operations other than a memory access. That is, while a read or write operation is specified as the command, an address in the address range is interpreted as causing the operation, in addition to or instead of the memory access. For example, interrupts can be signalled through an address range, system management operations can be specified through an address range, etc.
If translation of I/O-generated addresses is to be performed, a mechanism is needed for handling these special address ranges. Additionally, interrupts generated by the I/O devices (e.g. through a special address range, as message signalled interrupts (MSIs), etc.) must be handled correctly.